Researchers at CHOSE (Centre for Hybrid and Organic Solar Energy) at University of Rome ‘‘Tor Vergata’’ and Solertix (affiliated with Italy-based solar manufacturer FuturaSun) have reported reduced yield losses in cell-to-module scaling by utilizing ultranarrow interconnection of 19.5 μm.
In addition, the proposed interconnection technique may be used to achieve a 30% efficiency in area-matched 4T tandem designs featuring a perovskite module over a silicon cell.
The team fabricated mini perovskite solar panels with an active surface of 2.6 cm2 and a power conversion efficiency of 20.7%. They optimized the laser processes to fabricate the interconnects that are used to go from cells to modules. However, as the area used for the interconnects does not produce energy, they used a new layout to minimize this area without introducing other types of losses. The factor that takes this into account is the geometrical fill factor (GFF) which describes the ratio between active area and the sum of active area and interconnects. The team reported a record of around 99.6% in this factor.
The Italian team explained that, when upscaling from perovskite cells to modules, losses can be caused by layer inhomogeneity loss, P2 ohmic loss, shunts across P1 and P3, and sheet resistance loss. The so-called P1, P2, and P3 scribes correspond to the three scribing steps of the process for building the monolithic interconnections that add voltages between cells in modules. The P1 and P3 steps are aimed at isolating the back contact layers of neighboring cells and the P2 step creates an electrical path between the back contact of a cell with the front contact of an adjacent cell. The P3 step, in particular, is often a source of undesired effects such as back contact delamination, flaking, or poor electrical isolation, due to residues that remain in the trench.
The module was built with three cells, each with an area of 0.87 cm2. The cells were all designed with a substrate made of glass and indium tin oxide, a hole-transporting material relying on poly(triarylamine) (PTAA), a perovskite absorber, an electron transport layer based on phenyl-C61-butyric acid methyl ester (PCBM), a bathocuproine (BCP) buffer layer, and copper (Cu) metal contact.
According to the scientists, two rectangular shapes with 1 cm2 active area were designed, with the aim to reduce resistive losses occurring mostly at the TCO electrode: the active areas are defined by a P3 scribe, followed by a P2 scribe to use the remaining metal electrode as a current collecting electrode for the TCO. Using the P2-P3 process enabled the integration of a current collecting grid using the same metal layer as the top electrodes.
The group tested a module built with this architecture and an ultranarrow interconnection of 19.5 μm under standard illumination conditions and found it can reach an efficiency of 20.7%, a fill factor of 81.7%, and a geometrical fill factor of 96%, with no relevant resistive losses being detected.
In the future, the team said it wants to apply an unspecified advanced alignment procedure to avoid possible warping of the module during processing.
